Magore See all condition definitions — opens in a new window or tab Add to Watch list Watching Watch list is full. Select a valid country. Ic amplifies the 2 nd local if signal, which then becomes an audio baseband signal through a detector circuit internal to ic China sony ic China laptop ic China ic sound chips. Established in ,shenzhen ruisheng weiye electronic co. Get an immediate offer.
|Published (Last):||28 September 2018|
|PDF File Size:||8.48 Mb|
|ePub File Size:||4.46 Mb|
|Price:||Free* [*Free Regsitration Required]|
The receivers also feature hysteresis to greatly improve noise rejection. High Data Rate. Low Power Consumption? Low Power Shutdown Function?
Input Impedance - 0. Pb-free available Applications? Intersil Americas Inc. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
V- Internally generated negative supply V nominal. GND Ground lead. Connect to 0V. C1- External capacitor - terminal is connected to this lead. C2- External capacitor - terminal is connected to this lead. An internal k? Transmitter Outputs. Receiver Inputs. These inputs accept RS input levels. An internal 5k? Receiver Outputs. Enable input. This is an active low input which enables the receiver outputs. SD Shutdown Input. NC No Connect. No connections are made to these leads.
Either 0. F capacitors may be used. R3IN 8 1? GND VCC V- Continuous ROUT. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 2. Only HIN See Tech Brief TB for details. Guaranteed by design. Transmitter Outputs, 3k? The circuit is divided into three sections: The charge pump, transmitter, and receiver. Charge Pump An equivalent circuit of the charge pump is illustrated in Figure 1.
The charge pump contains two sections: the voltage doubler and the voltage inverter. The nominal clock frequency is 16kHz.
During phase one of the clock, capacitor C1 is charged to VCC. During phase one, C2 is also charged to 2VCC, and then during phase two, it is inverted with respect to ground to produce a signal across C4 equal to -2VCC. The charge pump accepts input voltages up to 5.
A typical application uses 1? F capacitors for C1-C4, however, the value is not critical. The transmitter outputs are disabled and the receiver outputs are placed in the high impedance state. Each transmitter input has an internal k? The outputs are short circuit protected and can be shorted to ground indefinitely. The powered down output impedance is a minimum of ? The receivers have a typical input threshold of 1.
The receiver output is 0V to VCC. The output will be low whenever the input is greater than 2. The receivers feature 0. The receiver outputs are also placed in the high impedance state when in shutdown mode. The applications presented represent typical interface configurations.
In applications requiring four RS inputs and outputs Figure 10 , note that each circuit requires two charge pump capacitors C1 and C2 but can share common reservoir capacitors C3 and C4.
The benefit of sharing common reservoir capacitors is the elimination of two capacitors and the reduction of the charge pump source impedance which effectively increases the output swing of the transmitters. Silox Thickness: 7k? In case of conflict between English and Metric dimensions, the inch dimensions control. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0. E and eA are measured with the leads constrained to be perpendicular to datum -C-.
B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0. N is the maximum number of terminal positions. Mold flash, protrusion and gate burrs shall not exceed 0. Interlead flash and protrusions shall not exceed 0. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area.
Terminal numbers are shown for reference only. Converted inch dimensions are not necessarily exact. Allowable dambar protrusion shall be 0. Dimensions D and E to be determined at seating plane -C-. Dimensions D1 and E1 to be determined at datum plane -H-. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0. Dimension b does not include dambar protrusion. All Intersil products are manufactured, assembled and tested utilizing ISO quality systems. Intersil products are sold by description only.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.
Weitere Informationen zu Produkt HIN232CP-Z von Intersil bei Bürklin Elektronik:
HIN232CPZ DATASHEET PDF